Books R. de J. Romero-Troncoso, Electrónica Digital y Lógica Programable, Ed. Universidad de Guanajuato, México 2007. buy the book… R. de J. Romero-Troncoso, Sistemas Digitales con VHDL, Ed. Legaria, México 2004.
Journal Papers - Osornio-Rios R. A., Romero-Troncoso R. de J., Herrera-Ruiz G., Castañeda-Miranda R., FPGA implementation of higher degree polynomial acceleration profiles for peak jerk reduction in servomotors. Robotics and Computer-Integrated Manufacturing, Elsevier, Vol. 25, 2009, pp 379-392.
Alaniz-Lumbreras P. D., Gómez-Loenzo R. A., Romero-Troncoso R. de J., Peniche-Vera R. del R., Jáuregui-Correa J. C., Herrera-Ruiz G., Sensorless detection of tool breakage in milling. Machine Science and Technology , Taylor & Francis, Vol. 10, 2006, pp 263-274.
International Conference Papers Mendoza-Camarena U. S., Romero-Troncoso R. de J., VHDL core for the computation of the one-dimensional discrete cosine transform, Proceedings of the 2006 International Conference on Reconfigurable Computing and FPGAs, IEEE Computer Society, 20-22 September, San Luis Potosí, México, 2006.
Romero-Troncoso R. de J., Ordaz-Moreno A., Vite-Frias J. A., García-Pérez A., 8-bit CISC microprocessor core for teaching applications in digital systems laboratory, Proceedings of the 2006 International Conference on Reconfigurable Computing and FPGAs, IEEE Computer Society, 20-22 September, San Luis Potosí, México, 2006.
A. Frías-Velázquez and R. De J. Romero Troncoso, Algorithm for convergence criteria simulation on LMS adaptive filters, Third International Workshop on Random Fields Modelling and Processing in Inhomogeneous Media RFMPIM 2005, IEEE Signal Processing Society, Guanajuato, México, 24-25 October, 2005.
J. A. Vite-Frías, R. De J. Romero-Troncoso and A. Ordaz-Moreno, VHDL core for 1024-point radix-4 FFT computation, Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, IEEE Computer society, 28-30 September, Puebla, México, 2005.
A. Ordaz-Moreno, R. De J. Romero-Troncoso and J. A. Vite-Frías, Hardware signal processing unit for one-dimensional variable-length discrete wavelet transform, Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, IEEE Computer Society, 28-30 September, Puebla, México, 2005.
J. M. Ramos-Arreguín and R. de J. Romero-Troncoso, Adaptación del plan de estudios de la carrera de electrónica y automatización en la UTSJR, para la incorporación de herramientas VHDL y lógica programable, Proceedings of the 2004 International Conference on Reconfigurable Computing and FPGAs, Colima, México, September 2004, pp 258-265.
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